make results_iverilog.xml make[1]: Entering directory `/home/lkcl/src/libresoc/soc/src/soc/litex/florent/cocotb' MODULE=test TESTCASE=idcode_reset,idcodesvf_reset TOPLEVEL=ls180 TOPLEVEL_LANG=verilog \ /usr/local/bin/vvp -M /home/lkcl/src/libresoc/cocotb/cocotb/libs -m libcocotbvpi_icarus sim_build_iverilog/sim.vvp -.--ns INFO cocotb.gpi ..mbed/gpi_embed.cpp:76 in set_program_name_in_venv Did not detect Python virtual environment. Using system-wide Python interpreter -.--ns INFO cocotb.gpi ../gpi/GpiCommon.cpp:99 in gpi_print_registered_impl VPI registered -.--ns INFO cocotb.gpi ..mbed/gpi_embed.cpp:247 in _embed_sim_init Python interpreter initialized and cocotb loaded! 0.00ns INFO cocotb __init__.py:247 in _initialise_testbench_ Running on Icarus Verilog version 11.0 (devel) 0.00ns INFO cocotb __init__.py:254 in _initialise_testbench_ Running tests with cocotb v1.6.0.dev0 from /home/lkcl/src/libresoc/cocotb/cocotb 0.00ns INFO cocotb __init__.py:274 in _initialise_testbench_ Seeding Python random module with 1617280649 0.00ns INFO cocotb.regression regression.py:127 in __init__ Found test test.idcode_reset 0.00ns INFO cocotb.regression regression.py:127 in __init__ Found test test.idcodesvf_reset 0.00ns INFO cocotb.regression regression.py:481 in _start_test Running test 1/2: idcode_reset 0.00ns INFO ...test.idcode_reset.0x14f7481e56d8 decorators.py:313 in _advance Starting test: "idcode_reset" Description: None 0.00ns INFO cocotb.ls180 test.py:58 in idcode_reset Running IDCODE test; cpu in reset... 13.20ns INFO cocotb.ls180 test.py:47 in idcode IDCODE1: 00000000000000000001100011111111 27.60ns INFO cocotb.ls180 test.py:52 in idcode IDCODE2: 00000000000000000001100011111111 27.60ns INFO cocotb.ls180 test.py:68 in idcode_reset IDCODE test completed 27.60ns INFO cocotb.regression regression.py:373 in _score_test Test Passed: idcode_reset 27.60ns INFO cocotb.regression regression.py:481 in _start_test Running test 2/2: idcodesvf_reset 27.60ns INFO ..st.idcodesvf_reset.0x14f74919d860 decorators.py:313 in _advance Starting test: "idcodesvf_reset" Description: None 27.60ns INFO cocotb.ls180 test.py:90 in idcodesvf_reset Running IDCODE through SVF test; cpu in reset... 27.60ns ERROR cocotb.regression regression.py:408 in _score_test Test Failed: idcodesvf_reset (result was ParseError) Traceback (most recent call last): File "/home/lkcl/src/libresoc/soc/src/soc/litex/florent/cocotb/test.py", line 98, in idcodesvf_reset yield from execute_svf(dut, jtag=jtag, svf_filename="idcode.svf") File "/home/lkcl/src/libresoc/soc/src/soc/litex/florent/cocotb/test.py", line 37, in execute_svf yield jtag_svf.run(svf_deck, p=dut._log.info) File "/home/lkcl/src/libresoc/c4m-jtag/c4m/cocotb/jtag/c4m_jtag_svfcocotb.py", line 228, in run yield self.execute(p.parse_string(cmds)) File "/usr/local/lib/python3.7/dist-packages/modgrammar/__init__.py", line 520, in parse_string for result in self._parse_text(string, True, True, data, 'complete'): File "/usr/local/lib/python3.7/dist-packages/modgrammar/__init__.py", line 455, in _parse_text count, obj = self._parse(pos, session, matchtype) File "/usr/local/lib/python3.7/dist-packages/modgrammar/__init__.py", line 395, in _parse raise ParseError(self.grammar, self.text.string, errpos, char, line=line, col=col, expected=expected) modgrammar.ParseError: [line 1, column 1] Expected '!' or 'ENDDR' or 'ENDIR' or 'RUNTEST' or 'SDR' or 'SIR' or 'STATE' or 'TRST' or end of line: Found 'HIR 5 TDI (1f) S' 27.60ns ERROR cocotb.regression regression.py:494 in _log_test_summary Failed 1 out of 2 tests (0 skipped) 27.60ns INFO cocotb.regression regression.py:569 in _log_test_summary ****************************************************************************** ** TEST PASS/FAIL SIM TIME(NS) REAL TIME(S) RATIO(NS/S) ** ****************************************************************************** ** test.idcode_reset PASS 27.60 0.03 1089.53 ** ** test.idcodesvf_reset FAIL 0.00 0.00 1.18 ** ****************************************************************************** 27.60ns INFO cocotb.regression regression.py:586 in _log_sim_summary ************************************************************************************* ** ERRORS : 1 ** ************************************************************************************* ** SIM TIME : 27.60 NS ** ** REAL TIME : 0.06 S ** ** SIM / REAL TIME : 465.78 NS/S ** ************************************************************************************* 27.60ns INFO cocotb.regression regression.py:268 in tear_down Shutting down... WARNING: ../ls180.v:5501: $readmemh(mem.init): Not enough words in the file for the requested range [0:127]. WARNING: ../ls180.v:5521: $readmemh(mem_1.init): Not enough words in the file for the requested range [0:31]. make[1]: Leaving directory `/home/lkcl/src/libresoc/soc/src/soc/litex/florent/cocotb'